Validator Tool Suite
Ştefan Resmeriṭă, Patricia Derler, Wolfgang Pree, Kenneth Butts · Computational analysis, synthesis, and design of dynamic models series · 2012
The advances of the semiconductor industry seen in the last decades have brought the possibility of integrating evermore functionality onto a single chip. These integration possibilities also imply that the design complexity increases and so does the design time and effort. This challenge is widely acknowledged throughout academia and the industry, and to address this, novel frameworks and methods that will both automate design steps and raise the level of abstraction used to design systems are being called upon.