System on chip implementation of floating point matrix inversion using modified Gram-Schmidt based QR decomposition on PYNQ FPGA
K Venkata Siva Kumar, Venkata Reddy Kopparthi, Samrat Lagnajeet Sabat, Thulasiram Varma.K, Rangababu Peesapati · 2021 IEEE International Symposium on Smart Electronic Systems (iSES) · 2021
This work presents a system on chip (SoC) implementation of floating-point matrix inversion using the modified Gram-Schmidt based QR decomposition technique. The SoC realization is carried out using High-Level Synthesis on PYNQZl board. The latency and resource utilization of modified Gram-Schmidt is compared with classical Gram-Schmidt QR decomposition for different bus interface techniques by realizing a 100×100 matrix decomposition on a Xilinx PYNQZl board. Further, the designed QR hardware IP is used for realizing the floating-point matrix inversion of size 25×25. The accuracy, hardware execution time, and resource utilization are evaluated and compared with Givens rotation-based inverse. The implementation results on PYNQ-ZI demonstrate the successful realization of resource-efficient matrix inversion on Field Programmable Gate Array (FPGA).