A HT Detection and Diagnosis Method for Gate-level Netlists based on Machine Learning
Maofan Du, Zhao Huang, Chen Yin, Liang Li, Quan Wang, Jinhui Liu · 2021 IEEE 6th International Conference on Signal and Image Processing (ICSIP) · 2021
The risk of hardware Trojan (HT) attack in the design step of the integrated circuit (IC) development process has become a “hot spot” in hardware security. Despite some solutions presented in the literature, there are still limitations such as high time complexity, low HT detection accuracy, and the inability to locating HTs. This paper presents a novel HT detection and diagnosis method based on machine learning (ML) to identify the HT-related gates/nets maliciously inserted into the IC gate-level netlists at design stage. We partition the circuit into n sectors and extract five HT-related features from the netlists of each sector to construct a five-dimensional vector of that sector. Then, these n five-dimensional feature vectors are trained using support vector machine (SVM) to obtain the learned model. We have evaluated our method on the ISCAS'85 benchmark circuits. The experimental results show that our method can achieve 100% true positive rate (TPR), more than 90% true negative rate (TNR), complete 95% average precision and F-measure, average accuracy exceeds 80%. Moreover, it can also report the possible implantation location of a Trojan instance.