FPGA Implementation of a Face Recognition System
S. Sethu Selvi, D Bharanidharan, Abdul Qadir, K. Pavan · 2021 IEEE International Conference on Electronics, Computing and Communication Technologies (CONECCT) · 2021
Recently machine and deep learning algorithms are considered very often for solving real life problems. These algorithms are generally implemented on CPUs or GPUs, which are not meant to execute machine learning algorithms. While these algorithms are required for artificial intelligence-based systems, they have the problem of being computationally intensive with large power consumption and execution time. Some applications also require functional safety, and GPUs are expected to meet the functional safety requirements, which is a time-consuming challenge for GPU designers. As an alternative Field Programmable Gate Arrays (FPGAs) are preferred in avionics and defense-based applications where functional safety is a key factor. FPGA based systems offer increased performance, lower power consumption, low latency and low implementation cost compared to CPUs and GPUs. They also can configure hardware meant for realizing machine learning algorithms which incorporates parallel execution and customized data types. The primary goal of this paper is to implement a face recognition algorithm on Xilinx PYNQ Z2 FPGA and compare various performance parameters. FPGA was able to perform face recognition in real time with average precision of 91.6% and overall accuracy of 92%.