Efficient Digital Implementation of Quadrature Demodulator for Radar Receivers
Taniza Roy · 2021 IEEE International Conference on Electronics, Computing and Communication Technologies (CONECCT) · 2021
Quadrature demodulators achieve downconversion of signals at Intermediate Frequency (IF) to baseband in a super-heterodyne radar receiver. The process also computes the in-phase and quadrature components of the radar receive signal at intermediate frequency. Based on the functional requirements of the radar, an efficient digital implementation of a radar receiver quadrature demodulator is presented in this work. Various implementation techniques have been presented which make the design optimized in terms of resource utilization. An Architecture in which DDS coefficients can be stored in memory or implementation of DDS and multipliers can be avoided altogether by suitable choice of sampling frequency at IF is discussed in detail. The work also presents detailed design methodology adopted along with implementation and modeling results at each stage of the design.