A Hybrid ZQ Calibration Design for High-Density Flash Memory Toggle 5.0 High-speed Interface

Tongsung Kim, Anil Kavala, Hyunsuk Kang, Youngmin Jo, Jungjune Park, Kyoungtae Kang, Byung-Kwan Chun, Dong-Ho Shin, Dong-Su Jang, Byunghoon Jeong, Chi-Weon Yoon, Jin-Yub Lee, Jaihyuk Song · 2021 IEEE Asian Solid-State Circuits Conference (A-SSCC) · 2021

As market demands for cloud, machine learning, and artificial intelligence have increased, the standards such as PCI Express 5 and Toggle5.0 with high data-rate have been emerged. As the required data-rate increases, better signal integrity is required which leads to the needs for small input/output capacitance (CIO) and accurate impedance (RZQ) matching between the transmitter and the channel impedance. In addition, the training time requirement of high-density flash memory is stringent as it consists of multiple dies in one package.

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