Energy Measurement Laboratory for Heterogeneous Hardware Evaluation
Leandro Diaz, Rodrigo Moreira, Federico Favaro, Ernesto Dufrechou, Juan Pablo Oliver · 2021 IEEE URUCON · 2021
Power consumption has become a main constraint in hardware design, and it is becoming a growing concern in HPC community due to the economic cost of electricity and the environmental impact. This paper presents our power measurement laboratory and include as an application example the comparison between FPGA and CPU running an image segmentation algorithm. The FPGA implementation targets AlveoU50 board and was developed using Vitis HLS, the CPU uses OpenCV library and runs in an Intel Xeon 4208. The FPGA version is 20x more energy efficient than the CPU for 4K images and 38x for 8K images.