Lowering the Error Floor of Quantized NR LDPC Decoders by a Post-Processing on Trapping Sets
Hai He, Ming Jiang, Mingyang Zhu, Chunming Zhao · 2021 13th International Conference on Wireless Communications and Signal Processing (WCSP) · 2021
This paper presents a novel two-stage quantized iterative decoder to lower the error floor for new radio low-density parity-check (NR LDPC) codes. In the first stage, quantized normalized min-sum (NMS) decoding algorithm is used to guarantee the performance of waterfall region. The second stage is executed if the syndrome reaches the specific criterion about the number of unsatisfied check constraints. The cyclic-shifting CRC detection (CSCD) and syndrome assistant CSCD (SA-CSCD) algorithm designed to flip the error bits in possible positions based on the error patterns and the base graph (BG) to lower the error floor. Simulation results show that the proposed algorithm can effectively lower the error floor of NR LDPC while maintaining an acceptable complexity.