Hardware-based Cryptographic Accelerator for Post Quantum Era
Lukáš Malina, Peter Cíbik, Petr Jedlicka, David Smékal, Sara Ricci, Jakub Hrabovský · 2021
Emerging quantum computing brings many benefits in numerous applications and services as solving efficiently complex operations and problems. Nevertheless, quantum computing may also jeopardize current cryptography standard schemes by solving the problems used in these schemes. Therefore, new quantum-resistant cryptographic primitives and installations are required for the near future. In this work, we present a hardware-based cryptographic accelerator that provides resistance to quantum computer attacks. Directly in VHDL, we design and implement essential cryptographic functions which can be loaded to our accelerator equipped with the FPGA board. Our solution provides efficient encryption, signing, and hashing operations for securing the input data or network packets. Moreover, we create a high-level software demonstrator for setting and using these operations in the accelerator. The presented results prove that cryptography functions accelerated in our hardware-based solution are more efficient than software implementations. Therefore, our solution can provide high-speed and quantum-secure data processing.