Implementation and Evaluation of Adaptive Cache Insertion Policies for Real-Time Systems
Bruna Arruda Araujo, Giovani Gracioli, Tomasz Kloda, Denis Hoornaert, Marco Caccamo · 2021
Memory caches are a key source of unpredictability in today’s cyber-physical systems. This fact is mainly due to the high time penalties caused by cache misses. A block that needs to be replaced may need up to 100 times more cycles than a block already in the cache (cache hit). Several studies in the area of realtime systems were carried out aiming to minimize the impact of cache memories on the Worst-Case Execution Time (WCET) of real-time systems. The main approaches are related to cache line replacement policies and cache partitioning mechanisms, as the LRU-based adaptive insertion policies LIP, BIP and DIP, which were developed to try to mitigate the trashing problem of LRU. Several studies have already proven that replacement policies can be influenced by cache parameters, but none of them presented an analysis of the impact of these parameters on policies applied to cache partitions.In this scenario, this work aims to provide an analysis of the impact that cache-related parameters have on the adaptive cache insertion policies applied to a set of benchmarks. For this, we used a cache profile simulator. The results obtained prove that parameters as cache partition size and the number of ways, in fact, play an important factor in the performance and schedulability of applications.