System-on-Chip-Challenges in the Deep-Sub-Micron Era
Jan M. Rabaey · Kluwer Academic Publishers eBooks · 2006
Continued scaling of semiconductor technology has created hopes for true system-on-a-chip integration; that is, the integration of a complete system on a single die of silicon. Yet, this prospect is seriously challenged by cost considerations. Solutions that maximize flexibility and re-use may be the only way to address the cost concerns, but necessitate offsetting the energy and performance penalty that comes with software solutions through an aggressive use of concurrency. A truly network-based solution is the only option to resolve the many issues that come with massive parallelism such as reliability, robustness, synchronization, and power management. This chapter presents an insight in some of the approaches and methodologies that are currently under development at the Gigascale Systems Research Center [GSRC].