R.E.A.L. DSP: Reconfigurable Embedded DSP Architecture for Low-Power/Low-Cost Telecom Baseband Processing
E. Lambers, CM Moerman, Peter Kievits, J. Walkier, R. Woudsma · Kluwer Academic Publishers eBooks · 2006
The R.E.A.L. DSP architecture for embedded applications features a high level of parallelism in the data path and the possibility to add specific peripheral modules, or to integrate dedicated application-specific execution units. Program code is compact by using a highly compressed instruction set, incorporating short (16-bit) instructions, orthogonal 32-bit instructions, and the possibility to define VLIW-type application-specific instructions. By its unique and leading architecture the R.E.A.L. DSP core is especially targeted for telecom terminals, in particular cellular phones. The core has been implemented in several ASIC technologies for different embedded applications, showing excellent performance and power figures.