DSP Implementation of a Low-Delay Filter Bank for Audio Applications

Florian Keiler, Udo Zölzer · 2003

An efficient implementation of a cosine modulated filter bank on a Motorola fixed-point digital signal processor (DSP) is presented. For M = 8 subbands and a filter length of N = 128 coefficients a maximum of 183 instructions per input sample (8.1 MIPS at 44.1 kHz) in both analysis and synthesis filter bank are required while having an overall delay time of 136 samples equivalent to 3.08 ms at 44.1 kHz sampling rate with a linear-phase filter prototype. The cosine modulated filter bank is implemented with a polyphase realization. The approach is extended to work also for lowpass filter prototypes which are non linear-phase. Thus with the modified approach an efficient polyphase realization of low-delay filter banks is possible. With the low-delay approach the overall delay time can be reduced to 3M samples (0.5 ms for M = 8 at 44.1 kHz sampling rate) in the DSP implementation while having quite low stopband attenuations. General Terms Algorithms

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