Approche multi-processeurs homogènes sur System-on-Chip pour le traitement d'image
Lionel Damez · HAL (Le Centre pour la Communication Scientifique Directe) · 2009
The conception of a real time embedded vision system imposes multiple and severe design constraints, which could be conflicting. Smart camera applications usually requires integration of sofisticated processing near the transducer, with sufficient processing power to run the algorithms at the information flow rate, and using a system of minimal size that consumes little power. Today, transistor integration density enables concentration of the main part, or even all, of a complete system on a sole component (System on a Chip - SoC). A strongly automated design flow is proposed, it reduces the design effort and conception costs, in order to enable fast implementation of complex algorithms into a SoC. Our overall hardware implementation method is based upon meeting algorithm processing power requirement and communication needs with refinement of a generic parallel architecture model. Actual hardware implementation is done by the choice and parameterization of readily available reconfigurable hardware modules and customizable commercially available IPs. Software conception is based upon parallelisation of the algoritms. An homogeneous and regular hardware architecture model is chosen which enables to use parallelisation tools. With the design method, most of the works presented in this thesis are focused on enabling a automated hardware design enviromnent. This includes various works, tools enabling automated generation of a homogeneous network of communicating processors, or hardware components (IP) for communication network, including a paquet router. The presented approach is illustrated with the embedding a real time image stabilization algorithm on SoPC technology.