Built-in test for CMOS circuits
C.W. Starke · International Test Conference · 1984
In CMOS technology combinational circuits become sequential in the presence of stuck-open faults. Instead of a single test pattern a sequence of patterns is necessary for each such fault. In this paper two kinds of hardware test generation techniques for built-in testing are described which produce the required sequences. One approach is suitable for sequential CMOS circuits the other for combinational CMOS circuits.