NOVEL HIGH-SPEED FPGA-BASED FFT PROCESSOR
王旭东, Wei Xu, 党小宇 · Acta Scientiarum Naturalium Universitatis Sunyatseni · 2013
A novel architecture for computing the fast Fourier transform ( FFT ) on programmable devices is presented.To improve the system operation speed , a hybrid parallel FFT algorithm is used.Results indicate that the use of an 8×8parallel structure for realizing the 64-point FFT leads to a 8times higher processing speed compared with its counterparts employing other series of techniques.