Performance and Decoder Complexity Estimates for Families of Low-Density Parity-Check Codes
Samuel J. Dolinar, Kenneth S. Andrews · 2007
We present methods to estimate code performance and decoder complexity from the code rate, block size, and word-error rate, for families of related low-density parity-check (LDPC) codes. Performance estimates are generally within a couple tenths of a decibel of results determined by simulation; estimates of complexity (and hence decoder speed) are generally within 10 percent. Experimental data show that there is a trade-off between complexity and code performance determined by the design of the LDPC code, and that each 1 dB (26 percent) of increased complexity is worth about a 0.1-dB reduction in the required signal-to-noise ratio.