A Study on the Output Queuing control scheme for QoS Improvement in ATM Switch
Sang Tae Lee, Nam Hui Kim, Gi Yong No, Byeong Sil Jeon · 1999
In this paper, we propose a new cell discarding and scheduling scheme which reduce cell loss rate by measuring, in real time, the number of discarded cells in the queuing system with a different loss priority for each class of service such that each class of service meets its cell loss late requirements and reduce average delay rate for the traffic that is sensitive in average delay rate in output buffer of the ATM switch. In proposed scheme, we use three address buffers, one common buffer, and idle address buffer which is control the address in common buffer for improving the buffer utility and delay requirements can be reduced by the modified existing cell scheduling scheme. Throughout the computer simulation, the existing scheduling scheme and proposed scheme are compared with respect to cell loss rate and average delay time. And, in proposed scheme, we compare cell discarding algorithm I with algorithm II in cell loss rate and average delay time.