Power Side-Channel Analysis for Different Adders on FPGA
Yilin Zhao, Qidi Zhang, Hiroki Nishikawa, Xiangbo Kong, Hiroyuki Tomiyama · 2021
Many IoT circuits are under threat from side-channel attacks such as power analysis attacks. Adders are one of the most fundamental components in electronic circuits. In this paper, we study the tolerance of adders against power analysis attacks on FPGA. The power side-channel leakage for three types of 32-bit adders is analyzed based on T-test. Our experimental results show the effectiveness of a ripple-carry adder with built-in carry chain in terms of not only power and delay but also the tolerance to power analysis attacks.