Using SRAM-based CIM Architecture as the Event Detector for AIoT Applications
Chih-Cheng Lu, Muhammad Bintang Gemintang Sulaiman, Chin‐Yu Lin, Jian-Bai Li, Cheng-Ming Shih, Wei-Shu Rih, Kai-Cheung Juang · 2021
Convolutional neural networks (CNNs) play a key role in deep learning applications. Computing-in-memory (CIM) architecture has demonstrated great potential to effectively compute large-scale matrix-vector multiplication. For implementation a CIM–based accelerator, a software and hardware co-design approach have to consider the hardware limitations of the CIM macro to map the weight into the AI edge-devices. In this paper, we proposed a hierarchical AI architecture to optimized the end-to-end system power in the AIoT application. CIM-based architecture for event detection is designed to trigger the next stage precision inference. In the experiment, CIM-aware algorithm with 4-bit activation and 4-bit weight on Hand gesture [2] and Yale face [3] datasets are examined to have >95% accuracy. Profiling tool to analyzed the entry-level CIM architecture are also developed.