Hardware realization of video enhancement and compression algorithms
Harish Reddy Kolanu, Priyadarshini Nagrale, Manish Okade, Kamalakanta Mahapatra · 2021 2nd International Conference on Range Technology (ICORT) · 2021
This paper presents implementation aspects of video enhancement and compression algorithms on hardware platforms. The implementation is motivated by the fact that sufficient studies have not been carried out earlier on hardware realization of video algorithms since major focus in the research community has been on analyzing algorithms from a software perspective and many a times ignoring the hardware board level aspects which are very critical from the defence point of view. This paper is a novel attempt to bridge this gap and present the practical considerations of video processing algorithms when run on hardware boards. We utilize both a general purpose board namely Raspberry Pi 3 as well as a dedicated video processing board namely TI's DaVinci DM6437 to show the performance of existing video algorithms so that when prototype development is carried out the designer could tradeoff performance and cost aspects depending on the application scenario. Primary focus in this work is on the utility of video processing algorithms for surveillance applications like UAV's and missiles.