Implementation and Test of a RISC-V Microprocessor for Space Vehicle Embedded Computing
Emil Agonoy, Scott Hasbrouck, Bogdan Udrea · ASCEND 2021 · 2021
View Video Presentation: https://doi.org/10.2514/6.2021-4085.vid RISC-V is a recently developed ISA with a growing community that supports its software and hardware ecosystem, and it has the potential to break the monopoly of the two dominating ISA architectures, SPARC and PowerPC, within in the space industry. Provided as an open-source ISA, RISC-V gives the potential for numerous professional and academic teams to develop and share implementations across industries. This paper explores the viability of RISC-V ISA for space vehicles through implementing an on-board computer using the NOEL-V RISC-V soft processor.