Efficient On-chip Acceleration of Machine Learning Models for Detection of RF Signal Modulation
Jongseok Woo, Kuchul Jung, Saibal Mukhopadhyay · 2021
This paper presents a design methodology for efficient on-chip acceleration of deep neural network (DNN) for classification of signal modulation in Radio Frequency signals. A low complexity DNN model with ternary weights is developed to reduce computational demand. A digital chip architecture with complex multiply-and-accumulate (MAC) engines are presented to accelerate the DNN model. Simulation results in 28nm CMOS show that the low-complexity DNN model coupled with the on-chip accelerator increases allowable instantaneous bandwidth of the RF signals with minimal impact on the classification accuracy.