A Fault Model to Detect Design Errors in Combinational Circuits
Puneet Ramesh Savanur, Spyros Tragoudas · 2021
A new fault model capable of effectively detecting design errors or defects that alter the functionality of an embedded module in a circuit is presented. It is built on the principle of Modified Condition Decision Coverage. An approach to efficiently generate test patterns using the proposed model is also presented. Experimental results demonstrate the effectiveness of the approach at the gates of a combinational circuit.