Digital Down Converter For 5G Systems
B. K. Nagesh, Venkata Siva Reddy · Perspectives in Communication, Embedded-systems and Signal-processing - PiCES · 2021
The high data rate message signals in 5G communication system is difficult to process the signals. Implementation of DDC in 5G systems is a better solution. The efficient way of designing and implementing a Wideband Digital down converter has been discussed. Since the received signal is RF signal of high data rates, intermediate frequency (IF) stage is used. The message signal is sampled and given as input as input to DDC. Sinusoidal signal generator based on CORDIC is used to demodulate the IF baseband signal. It is shown that filter bandwidth varies by decimation factor. Filtering is implemented in stages to obtain efficient response. Decimation by 4 and decimation by 2 is used after first FIR filter and next FIR filter respectively. MATLAB R2011b, ModelSim SE-6.4, Xilinx 13.2 version is used to simulate each block of DDC at system level testing and Sparten-3e FPGA hardware used implementing the design.