Design of A High Performance Monobit DFT Based on FPGA and 1-Bit Samplers
Pengfei Ji, Huan Lin Lv, Qingzhan Shi, Naichang Yuan · 2020
This paper proposes a new method of calculating Discrete Fourier Transform (DFT) for 1-bit signals sampled by 1-bit samplers based on Field Programmable Gate Array (FPGA), which can be high-efficiency and very fast under the proper conditions. A processing system for implementing the 256-point monobit DFT with the proposed method is designed in this paper. In this system, a constant iteration architecture, in which none multipliers are used, is devised to implement pipeline DFT calculation efficiently. The simulation results and theoretical analysis show that this designed processor can accurately work out the amplitude response and phase response of 1-bit signals faster, compared with radix-2 FFT, while the consumption of the processor is less. Especially, our design can process the monobit DFT with larger size if the sampling rate is determined, while do not have to consume more time for calculation, which means that the resolution and sensitivity of the proposed monobit DFT processor can be quite good.