High-Speed ASIC Implementation of Tanh Activation Function Based on the CORDIC Algorithm
Thanh Dat Nguyen, Dong Hwan Kim, Jin Seok Yang, Sang Yoon Park · 2021 36th International Technical Conference on Circuits/Systems, Computers and Communications (ITC-CSCC) · 2021
This paper presents a high-speed ASIC implementation of the tanh activation function (AF) for artificial neural network. The proposed architecture for tanh AF is designed using a highspeed cascade Coordinate Rotation DIgital Computer (CORDIC) to implement hyperbolic and division functions. CORDIC processing is accelerated by fixing the angle of rotation and removing parameters related to the direction of rotation. The proposed architecture was coded in Verilog hardware description language and synthesized by Synopsys Design Compiler using a 90-nm CMOS standard cell library. The implementation results show an improved area-delay product compared to the existing architectures.