To Design and Implement a 32-bit Unsigned Divider on FPGA
Jeevika Mary. A, B S Sukumar · Journal of Emerging Technologies and Innovative Research · 2021
Division is one of the most complex and dynamic among the four functions in microprocessors. Here we are designed with a divider that does some sorting work for division on 32-bit numbers. The high-speed 32-bit digital encryption component comes with split partitions and in addition a flight conversion system. The digital separation function provides completely different performance parameters such as delays and power consumption calculated with the Xilinx ISE 13.1 version with verification code FPGA which delivers optimal power, worth and excellent performance.