Preliminary Evaluation of Artificial Neural Networks as Test Pattern Generators for BIST
Tsutomu Inamoto, Kazuki Ohtomo, Yoshinobu Higami · 2021 36th International Technical Conference on Circuits/Systems, Computers and Communications (ITC-CSCC) · 2021
In this paper, we display a preliminary evaluation of some artificial neural networks (ANNs) that are used as test pattern generators (TPGs) for the BIST technology. In the evaluation, fault coverages of test patterns by ANN- TPGs and numbers of transistors required for those TPGs are compared with those of LFSRs and ROMs. Computational results display that ANN- TPGs with sufficient hidden nodes can yield higher fault coverages than LFSRs with fewer transistors than ROMs.