Circuit Design and CNTFET Implementation of Ultra-Fast Reversible Fast Adder
R. M. Bommi, S. Selvakumar Raja · SSRN Electronic Journal · 2016
VLSI concentrates on two major areas in logic circuit design, they are low power logic design and reduction in size of the circuit. This paper is focused on the reduction of the power consumed and heat dissipation by the logic circuit. The proposed system is developed with the basic of reversibility which is an eight bit reversible Carry Select Adder implemented with Carbon Nano Tube as the channel material for the transistors. The design is efficient in not only in terms of power but also makes its architecture simple. Simulation is carried out in HSPICE environment and the results shows that the proposed adder is faster and consumed less power when implemented in CNTFET as compared to CMOS.