Design of Multiplexer Based 64-Bit SRAM Using QCA
K. Pandiammal, D. Meganathan · SSRN Electronic Journal · 2016
Quantum-dot Cellular Automata is a new trend in nanotechnology and investigated as an alternative to the current CMOS technology. QCA provides an attractive computational paradigm to design digital system architecture. This work proposes a novel multiplexer-based 64-bit SRAM architecture in which the area and clock delay are optimized. The loop-based memory in motion paradigm is accomplished in each QCA memory cell and clocking zones are shared between memory cells. The read/write operations are implemented by simplified control circuitry with less area for the higher order memory array. The Proposed QCA memory cell with control circuit uses 104- QCA cells and reduced area. The advantages of the proposed work is sharing the clock zones in a column reduces the number of clock delay. For 8x8 memory utilizes only 5- clock cycles to complete read/write operations.