HAMBug: A Hybrid CPU-FPGA System to Detect Race Conditions
Danilo Damiao Almeida, Lucas Bragança, Frank Sill Torres, Ricardo Ferreira, José Augusto M. Nacif · IEEE Transactions on Circuits & Systems II Express Briefs · 2021
The evolution of computer algorithms and micro-architectures continuously leads to novel applications and solutions that explore modern computers' potential. A drawback of this development is the rising complexity of hardware-oriented tests during software development. This brief proposes Hambug, a method to support developers during software testing of parallel applications in CPU-FPGA environments. The main component is a run-time memory analyzer that employs shared channels. Thus, Hambug enables memory analysis of parallel applications without influencing the CPU using a hardware-based debug module. Experimental results indicate that this method presents lower slowdown compared with modern dynamic analysis tools.