Unsupervised Learning in Test Generation for Digital Integrated Circuits
Soham Roy, Spencer K. Millican, Vishwani D. Agrawal · 2021
The exponential complexity of automatic test pattern generation (ATPG) necessitates the use of heuristics in making choices during test generation. However, in practice no single heuristic fits all situations. Unsupervised learning can combine any number of known heuristics, such as input-output distance (logic depths), gate type, fanout information, and testability measures like Controllability and Observability Program (COP) and Sandia Controllability/Observability Analysis Program (SCOAP) through principal component (PC) analysis, and then the major PC can guide ATPG choices. This study combines three heuristics, distance, COP, and SCOAP. Some heuristic data are complemented and two major PC are obtained. These PC guide backtrace directions in a PODEM ATPG program. For most circuits, the number of backtracks either matches the best of the three heuristics or is lower than all.