A Novel Reversible Carry Look Ahead Adder for Bio-Medical Applications
S. Sharmila Devi, V. Bhanumathi · Journal of Physics Conference Series · 2021
Abstract Reversible logic is becoming more important in VLSI architecture in order to minimize power dissipation. In computational technologies like digital signal processing, nanotechnology, low-power CMOS, etc., this logic is used. If it comprises an equal count of inputs and an equal count of outputs that provide mapping, it is said to be reversible. This research work shows the realization of a Carry Look ahead Adder (CLA) using Reversible Partial Adder (RPA) and Peres Gate (PG) that achieves speed through parallel carry computations. By comparing the introduced research to previous work, the adder circuit’s output is measured. The simulation results indicate that the proposed reversible CLA achieves better area, power and delay reduction. The adder circuit can be incorporated as a useful feature in the low power design for biomedical devices because it is energy efficient and highly durable.