Design and Implementation of a 32-Bit ALU: A Review
Hari Nandan, Pawan Kumar Dahiya · SSRN Electronic Journal · 2019
The paper proposes different techniques to design and implement a 32-bit Arithmetic and Logic Unit (ALU) such as implementation of 32-bit ALU for Digital Signal Processor (DSP) processor core, multifunctional processor, cryptographic processor and Wi-Fi enabled 32-bit ALU, reversible gate, Feedback Switch Logic (FSL) and clock gating. The number of operations increases in ALU, due to which the complexity of operation increases and causes an increase in power consumption also. To reduce the power consumption in ALU, the paper designs the ALU with clock gating. All these designs are implemented on FPGA.