FT-LTR: Low-Timedelay Fault-Tolerant Algorithm for Mesh based Network-on-Chip
Longfei Ma, Xiucheng Wang · 2021
We explore fault-tolerant routing methods for mesh based Network-on-Chip by using dynamic switch XY-YX routing and generate fault nodes area. We begin by analyzing the difficulty of traditional dynamic XY-YX algorithms, and found that as the number of fault nodes is increasing, they are more likely to make wrong dicision. Thus, we improve a new algorithm to solve this problem. Then we analyze the delay caused by our algorithm, and propoed the conception of useless nodes to decrease time delay.