New Tools for Evaluating Parallel and Heterogeneous Architectures
Mario Badr · TSpace (University of Toronto) · 2020
Computer architecture is entering its second golden age. The number of servers worldwide is estimated to be ten million. The number of mobile devices in the world now exceeds two billion. But with the decline of technology scaling, performance improvements from shrinking transistors has dwindled. The world now turns to innovations in computer architecture for increased performance. A fundamental aspect of computer architecture is evaluating tradeoffs between design points. Evaluating these trade-offs is becoming more difficult due to the increased complexity of the hardware and applications. Traditional methods for evaluation are useful but limiting. In this dissertation, we propose to remove these limitations by complementing traditional tools with two new ones: Rhythm and Mocktails. The traditional method of simulating parallel systems is limiting for two main reasons. First, only a small sample of a workload’s execution is considered. Second, the input to the application has been reduced in size by orders of magnitude. Rhythm removes these limitations by modeling only the key interactions between the application, system software, and hardware, producing performance estimates in seconds or minutes for full runs of a benchmark with realistic inputs. We validate the fidelity of Rhythm’s estimates to measurements of workloads running on two real systems. Rhythm helps architects gain valuable insights on the performance of parallel architectures in the early stages of design, guiding them toward the design points that should be evaluated in more detail. The rapid evolution of mobile computing has led to a significant degree of heterogeneity in the hardware. The heterogeneity stems from domain-specific accelerators, which limits academic research because these accelerators (and their workloads) are proprietary. Mocktails removes this limitation for architects exploring the memory hierarchy by statistically modeling the memory access behaviour of compute devices without making assumptions about the hardware or workload. We validate the fidelity of Mocktails experimentally for caches and main memory. Architects can use Mocktails in their simulations to mimic the behaviour of a compute device, making the tool a useful conduit between industry and academia.