Dynamic row activation mechanism for multi-core systems
Tareq A. Alawneh, Raimund Kirner, Catherine Menon · 2021
The power that stems from modern DRAM devices represents a significant portion of the overall system power in modern computing systems. In multi-core systems, the competing cores share the same memory banks. The memory contention between these cores may lead to activate a large DRAM row only to access a small portion of data. This row over-fetching problem wastes a significant DRAM activation power with a slight performance gain.