Data Layout Transformation for Stencil Computations Using ARM NEON Extension
Kaifang Zhang, Huayou Su, Peng Zhang, Yong Dou · 2020
In this paper, we consider utilizing NEON Extension for Stencil Computation on ARM processors. It has always been a common topic for stencil computation optimizations, and much work has been conducted. Data-level parallelism is the basis of these optimizations, and lots have been done on the mainstream production processors from vendors such as Intel. The paper focuses on optimizing stencil computations on ARM processors supporting NEON SIMD extension. Specifically, we proposed a data layout transformation approach to address the stream alignment conflict when using NEON ISA on ARM processors. By modeling the overheads of transformation and computation we can evaluate the benefits gained from the approach precisely. Combining the fine-grained instruction arrangement and NEON intrinsic, better floating-point performance can be obtained than automatic vectorization with the compiler. We evaluate the efficiency of the approach with a series of stencil computations on an ARM processor. Results show that when using the NEON Extension with transformation, an average of 1.51× speedup and a maximum of 2.83× speedup can be obtained compared to the automatic vectorization method.