Configuration of boundary scan chain for optimal testing of clusters of non boundary scan devices
Choi, Jung · IEEE/ACM International Conference on Computer-Aided Design · 1992
Testing of boards containing a mixture of boundary scan components and clusters of non-boundary scan devices is considered. If a tester cannot contact the non-scan circuitry, the inputs and outputs of onboard boundary scan devices may be used as virtual tester pins. In this case, the time for testing the clusters depends on how the boundary scan chips are connected into a longer scan chain. A technique for configuring a chain of boundary scan chips to minimize the test time for clusters is presented.>