FPM 22.4 A Display Processor Conforming to All ATV Formats with 188-tap FIR Filters and 284 Kb FLFO Memories
Natsuko Matsuo, S. Hosotani, M. Yazawa, Satoshi Sugawa, Naoki Hayashi, Takashi Shinohara, Masahiko Takashima, Keisuke Okada, Tadashi Sumi · 1997
An ATV full format acceptable display processor has been developed. The WETS (write end toggle signal) based design scheme and the optimized hard wired approach have been employed to get a single chip solution.