Performance Analysis of Packet Switch Interconnection Networks with Output Buffer Modules
Hyeon-Seung Chu, Gyeong-Rin Park · The Transactions of the Korea Information Processing Society · 1999
Packet-switched multistage interconnection networks(MINs) have been widely used for digital switching systems and super computers. In this paper we show that multiple packets in a switching element can move to the succeeding switching element in one network cycle by fully utilizing the cycle bandwidth. Only one packet movement was usually assumed in typical MINs. we present an analytical model for the MNs with the multiple packet movement scheme, and validate it by computer simulation. Comparisons with the traditional MINs of single packet movement reveal that the throughput is increased up to about 30% for practical size MINs. Similar result was also obtained for delays. The performance increase is more significant when the network traffic is nonuniform.