Thermal-aware task scheduling on multicore processors
Sanjay Ranka, Zhe Wang · 2012
Power and heat density of multicore processor are increasing exponentially with Moore’s Law. High temperature negatively affects reliability and the cost of cooling and packaging. This makes thermal management a significant design challenge for multicore processors. High temperature raises the leakage power of the chip and thereby potentially lead to thermal runaway. Existing power-aware techniques do not address the temperature issues in multicore processors. Localized high-temperature “hot spots” and spatial gradients can be lead by the unbalanced power distribution and heat dissipation. Techniques like effectively scheduling of tasks on multicore processors are needed to reduce the “hotspot” and high temperature on the chip. In Chapter 3, we first focus on a compact temperature model of multicore processors. A major challenge in thermal-aware task scheduling is to estimate the temperature on chip effectively and efficiently. Existing detailed thermal models are computationally intensive. An easy-computed compact model that derives the temperature profile efficiently is needed in the thermal-aware task scheduling problems. We propose a compact Matrix Model to estimate the steady-state temperature of multicore processors effectively and efficiently. The experimental results show that our Matrix Model is an order of magnitude faster than existing thermal model. Further, we use this model to develop a novel greedy slack allocation algorithm for dependent tasks represented by Directed Acyclic Graph (DAG) on a multicore processor. The objective of the slack allocation is to minimize the peak temperature on any core for a given deadline. We also use this model to optimize the workload distribution for each core in a data parallel problem. The goal of this algorithm is to maximize the total throughput across all cores and the maximum temperature is bounded by a given threshold. We provide a thorough evaluation and comparison to show the effectiveness and efficiency of the thermal model and these algorithms. In Chapter 4, we propose to partition the “hot” tasks into multiple subtasks and interleave these subtasks with “cool” tasks to reduce the overall maximum temperature. We propose two heuristic task partitioning algorithms for a periodic set of tasks with common period and individual periods on single core processors, respectively. We also propose one heuristic task partitioning and scheduling algorithm on a set of independent tasks on multicore processors. Finally, we provide a thorough evaluation and comparison to show how task partitioning can assist in thermal-aware task scheduling problems. Thermal issues on multicore processors are mainly caused by high energy consumption. In Chapter 5, we focus on the reducing energy consumption on multicore systems with full memory hierarchy. We classify the energy consumption into computation energy on cores and communication energy on internal bus. We propose a general methodology to set the voltage and frequency level for cores as well as internal bus to minimize the energy consumption of the whole processor. This methodology considers processors’ temperature, energy consumption, memory hierarchy and algorithms’ input size together to achieve lower energy consumption of the chip as well as main memory. We analyze energy consumption of different matrix multiplication algorithms with different input sizes.