Rectification method for lookup-table type FPGA's
Kukimoto, Fujita Fujita · IEEE/ACM International Conference on Computer-Aided Design · 1992
A method to rectify lookup-table-type field-programmable gate array (FPGA) designs is presented. Instead of changing the netlist, only the functionality realized by lookup tables in a chip is modified and the netlist is retained so that there is no change in the delay of the chip. The problem is formalized using characteristic functions, and a redesign technique based on Boolean relations is presented.>