A NewRepresentation ror Faults in Combinational Digital Circuits
Andgernot Metze · 1972
identified andcombined intoclasses thatformageometric structure thateffectively subdivides theoriginal circuit into fan-out-free permanently tiedtothelogical 1level. Similarly aline segments. This fan-out-free characteristic allows asimplified analysis stuck-at-O (s-a-0) isconsidered tobepermanently tied ofmultiple fault conditions. Forcertain circuits, including all two-tothelogical 0level. Itisfurther assumed thateither level single-output circuits, itisshown that thedetection ofall single ofthefaults (s-a-1 ors-a-0) canoccuratanygateinput faults implies thedetection ofall multiple faults. oroutput orataprimary inputoroutput ofthecircuit. Thebehavior ofanycircuit underfault conditions isrepresented Itishenceforth assumed thatanyphysical failure ina interms oftheclasses ofindistinguishable faults. Thisresults ina description ofthefaulty circuit bymeans ofBoolean equations thatsystemhasbeenrepresented intermsoftheappropriate arereadily manipulated forthepurpose offault simulation ortestfault model.Whilesomephysical failures cannotbe generation. Aconnection graph interpretation ofthis fault representa- represented. assingle linefaults, itmaybeshownthat tion isdiscussed. Heuristic methods for theselection ofefficient testsnearly allfailures otherthan certain shorts between without extensive computation arederived fromtheseconnection graphs.