Power management of multi-core chips: Challenges and pitfalls
Pradip Kumar Bose, Alper Buyuktosunoglu, John A. Darringer, M. S. Gupta, Michael B. Healy, Hans Jacobson, I. Nair, Jude A. Rivers, J. Shin, Augusto J. Vega, Alan J. Weger · 2012
Modern processor systems are equipped with on-chip or on-board power controllers. In this paper, we examine the challenges and pitfalls in architecting such dynamic power management control systems. A key question that we pose is: How to ensure that such managed systems are “energy-secure” and how to pursue pre-silicon modeling to ensure such security? In other words, we address the robustness and security issues of such systems. We discuss new advances in energy-secure power management, starting with an assessment of potential vulnerabilities in systems that do not address such issues up front.