Impact of Cache Replacement Policies on Split Level One Cache Memory in Multicore System
Dhammpal Ramtake, Sanjay Kumar · Journal of Emerging Technologies and Innovative Research · 2019
Nowadays, multicore systems plays very significant role in computer applications. In multicore systems number of cores is embedded on one single chip. Each core has capability to execute millions of instruction in one second. In multicore environment as the number of levels of cache increases, the cache access time tends to consume a major percentage of memory latency and memory access latency decreases the performance of multicore systems. To reduce the access latency cache replacement policy is used. In this paper we implement the cache replacement policies such as LRU, FIFO, Random, PRLU and RRIP in gem5 simulation tool with 4 core (Quad core) X86 CPU architecture. In simulation 10×10, 100×100 and 500×500 floating point matrix multiplication object code is used as load. Results are obtained in hit ratio, miss ratio and access time parameters.