Deep Sub-micron I_DDQ Testing: Issues and Solutions
Manoj Sachdev · 1997
The effectiveness of I DDQ testing in deep sub-micron is threatened by the increased transistor sub-threshold leakage current. In this article, we survey possible solutions and propose a deep sub-micron I DDQ test mode. The methodology provides means for unambiguous measurements of I DDQ components and defect diagnosis. The effectiveness of the test mode is demonstrated with a real life example. 1 Introduction Static CMOS circuits have very low quiescent current or I DDQ . Most of the manufacturing defects in CMOS ICs, exhibit state dependent elevated I DDQ . Therefore, I DDQ testing is a powerful test method for manufacturing process defects detection. The effectiveness of an I DDQ based test method is incomparable in quality improvement, test complexity and test cost reduction [1]. However, one of the critical requirements of I DDQ testing is the accurate measurement of an extremely small current at the VDD or VSS terminal of the Device Under Test (DUT). Typically, the I DDQ thres...