VLSI Implementation of Multiply and Accumulate Unit Using Distributed Arithmetic
Rajyalakshmi Chikkani · Bioscience Biotechnology Research Communications · 2020
Background: DSP is used in many applications such as modems, audio broadcast, multimedia applications, cell phones, video broadcast, etc., DSP processors are concerned essentially with on-going signal processing.The "multiply and Accumulate Unit", It is dual operand digital signal processing instructions.MAC is considered important in all DSP architectures.MAC comprises multiplier, adder, and accumulator.Speed, area and performance are the major constraints that have to be considered.Methods: On considering DA method which replaces the MAC with pre-computed results about to store in lookup tables.DA based on the memory-based method is trending engineering since of its high performance.The derivation of DA includes a mix of Boolean and ordinary algebra.DA is a bit-serial arrangement of multiply-accumulate.The most advantage of DA is consumed the low area, high speed, and low power.Results: Implementation of actual DA with different architectures use in a traditional lookup table (LUT) based DAimplementation such as DA-based implementation use in Single LUT, DA based implementation use in double LUT, DA based implementation use in four LUTs, DA based implementation use in LUT and adder, adder based DAimplementation, 2BAAT DA structure with single LUT and double LUT and DA based implementation using zero detect logic.Finally, Comparing the overall performance in terms of area, power, and delay.Conclusions: Multiply and Accumulate (MAC) block design multiplier occupies more space than adder and accumulator since it consists of partial products, so area consumption of MAC block is more.So that delay increases, in this case, speed decreases.This is the main drawback of MAC.So, to overcome this drawback Distributed Arithmetic is preferred.Here an external multiplier block is not required and the multiplication is done through a look-up table.So partial product count will be reduced and delay decreases such that, area consumption also reduced and speed increases.