An astute LVQ approach using neural network for the prediction of conditional branches in pipeline processor
Sweety Nain, Prachi Chaudhary · ICST Transactions on Scalable Information Systems · 2018
Nowadays, microprocessors use the deep pipeline to execute multiple instructions per cycle. The frequency and behavior of conditional instructions mainly affect the performance of instruction-level parallelism. However, recent processors still have problems with the correct prediction of condition